According to studies by the inventors, examples of noise analysis designing technologies for electric devices include those described in Patent Documents 1 and 2.
Patent Document 1 describes a technology for an electromagnetic-field analyzing apparatus with a significantly reduced amount of memory used by a computer and simulation computing time, in which an error between a result of computation of electromagnetic compatibility by a simulation and an actual result of computation of electromagnetic compatibility is minimized.
Patent Document 2 describes a patchboard designing apparatus accurately performing various simulations regarding waveforms, heat, timing, electromagnetic radiation, and others in designing a print patchboard and a multi-chip module substrate.